Modelsim Failed to Open Design Unit File in Read Mode.
Welcome to EDAboard.com
Welcome to our site! EDAboard.com is an international Electronics Give-and-take Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Pattern, PCB, Service Manuals... and a whole lot more than! To participate you need to annals. Registration is free. Click hither to annals now.
- Forums
- Digital Blueprint and Embedded Programming
- PLD, SPLD, GAL, CPLD, FPGA Blueprint
You should upgrade or employ an culling browser.
Failed to open up file in read fashion.(modelsim)
- Thread starter Dylan01
- Start date
- Status
- Not open for further replies.
- #1
- Joined
- Jul 6, 2005
- Letters
- 9
- Helped
- 0
- Reputation
- 0
- Reaction score
- 0
- Trophy points
- 1,281
- Activity points
- ane,404
I want to read a data file and accept the data in memory,
while using following
$readmemb("data.dat", memory); (memory is a annals array)
modelsim giving following fault
** Warning: (vsim-7) Failed to open readmem file "information.dat" in read way.
and it is not reading the correct data.
Why this mistake is coming and what is the solution.contents of data.dat are :
@000
00010010
00000011
@002
11111111 01010101
00000000 10101010
@006
1111zzzz 00001111
someone plz propose solution
- #2
echo47
Advanced Fellow member level 5
- Joined
- Apr seven, 2002
- Letters
- three,942
- Helped
- 638
- Reputation
- 1,274
- Reaction score
- 89
- Trophy points
- i,328
- Location
- USA
- Activeness points
- 33,176
No problem here. I created data.dat and and so ran this is ModelSim SE 6.1b:
module test; reg [vii:0] memory [0:vii]; integer due north; initial begin $readmemb("data.dat", memory); for (n=0; n<8; north=northward+one) $brandish("%b", memory[n]); cease endmodule
# 00010010
# 00000011
# 11111111
# 01010101
# 00000000
# 10101010
# 1111zzzz
# 00001111
- #iii
- Joined
- Jul 6, 2005
- Messages
- 9
- Helped
- 0
- Reputation
- 0
- Reaction score
- 0
- Trophy points
- ane,281
- Activity points
- i,404
this is the lawmaking . 1 thing here that code was working fine to me previously just now its not working . i wanted to know is in that location a problem in s/w shud i reinstall it ..
module readfile;
reg [seven:0] memory[0:7];
integer i;
initial
begin
$readmemb("data.dat", memory);
for(i=0; i < 8; i = i + 1)
$display("Memory [%0d] = %b", i, retentiveness);
end
endmodule
- #4
echo47
Advanced Member level five
- Joined
- Apr vii, 2002
- Letters
- iii,942
- Helped
- 638
- Reputation
- 1,274
- Reaction score
- 89
- Bays points
- i,328
- Location
- USA
- Activeness points
- 33,176
Did the problem begin subsequently y'all updated your ModelSim? Here are comments from various Release Notes:
Verilog Defects Repaired in 5.8e:
* A problem relating to $readmem resulted in retention leaks and big load times.
Verilog Defects Repaired in 6.0b:
* The system tasks $readmemh and $readmemb used to report an error when chosen with a memory that was either an automatic variable or a Arrangement Verilog class property
Full general Defects Repaired in vi.0e:
* $readmem for dynamic arrays did non piece of work.
- #5
- Joined
- Jul 6, 2005
- Letters
- 9
- Helped
- 0
- Reputation
- 0
- Reaction score
- 0
- Trophy points
- ane,281
- Action points
- ane,404
i dont know what was the problem but after reinstalling it started working fine..
anyway thnks for ur assist
- #6
- Joined
- April 15, 2008
- Messages
- xv
- Helped
- 1
- Reputation
- 2
- Reaction score
- 1
- Trophy points
- i,283
- Action points
- 1,377
hi every body,
module test;
reg [seven:0] memory [0:seven];
initial begin
$readmemb("data.dat", memory);
end
endmodule
it not piece of work, ...
please help me.
file data.dat :
@000
00010010
00000011
@002
11111111 01010101
00000000 10101010
@006
1111zzzz 00001111
Alert (10036): Verilog HDL or VHDL alert at test.v(2): object "memory" assigned a value only never read
Fault (10054): Verilog HDL File I/O error at examination.v(v): can't open Verilog Blueprint File "data.hex"
Error: Can't elaborate acme-level user hierarchy
Error: Quartus 2 Analysis & Synthesis was unsuccessful. 2 errors, 1 warning
Info: Allocated 134 megabytes of retentiveness during processing
Error: Processing ended: Midweek Apr 16 00:37:46 2008
Error: Elapsed fourth dimension: 00:00:01
Error: Quartus II Full Compilation was unsuccessful. ii errors, 1 alert
- #7
- Joined
- Oct 27, 2010
- Letters
- 1
- Helped
- 0
- Reputation
- 0
- Reaction score
- 0
- Trophy points
- ane,281
- Activity points
- 1,285
module test;
reg [7:0] retentiveness [0:7];
integer n;
initial brainstorm
//Path of the file which needs to be opened and read.
$readmemb("$NC_HOME/information.dat", retentiveness);
for (n=0; n<viii; n=n+one)
$display("%b", memory[n]);
end
endmodule
- #8
- Joined
- Sep 23, 2009
- Messages
- 18
- Helped
- three
- Reputation
- 6
- Reaction score
- 3
- Trophy points
- 1,283
- Location
- Pakistan
- Activity points
- 1,412
- Status
- Not open for further replies.
Similar threads
- [SOLVED] problem with file read style
- Started by pocho
- Replies: eight
- Forums
- Digital Design and Embedded Programming
- PLD, SPLD, GAL, CPLD, FPGA Blueprint
- This site uses cookies to aid personalise content, tailor your feel and to keep you logged in if you annals.
By continuing to employ this site, you are consenting to our use of cookies.
Modelsim Failed to Open Design Unit File in Read Mode.
Source: https://www.edaboard.com/threads/failed-to-open-file-in-read-mode-modelsim.50478/